SN74LVC1G3157 4.5 Ω Low-Voltage SPDT Analog Switch

A single-pole double-throw switch for routing analog or digital signals from 0 V to V+. It combines 4.5 Ω typical on-resistance at 5 V, 300 MHz typical bandwidth and 1.8 V to 5.5 V supply operation.

Engineering scope: Values on this page are derived from the supplied SN74LVC1G3157 Rev A.1 product specification. Use the released PDF, qualified ordering information and board-level validation for production decisions.

Photorealistic SN74LVC1G3157 six-pin product appearance with NYFEA full-model marking
SN74LVC1G3157 six-pin product presentation in the NYFEA full-model marking style. The PDF-listed 3157 production marking and dimensioned package drawing remain the authority for receiving inspection and PCB-library release.
4.5 Ω typicalOn-resistance at 5 V
300 MHzTypical -3 dB bandwidth
1.8 V to 5.5 VRecommended supply range
SC70-6 / SOT23-6MSL 3, tape and reel

Product Overview and Selection Scope

SN74LVC1G3157 is one bidirectional single-pole double-throw analog switch controlled by a digital IN pin.

  • Low signal loss: 4.5 Ω typical on-resistance at V+ = 5 V.
  • Wide signal bandwidth: 300 MHz typical -3 dB bandwidth with a 50 Ω load.
  • Fast switching: 30 ns typical turn-on at 5 V and 25 ns typical turn-off at 5 V.
  • Break-before-make: the active channel opens before the alternate channel closes.
  • Rail-to-rail signal path: analog signals are specified from 0 V to V+.
  • Analog or digital routing: NO, NC and COM are bidirectional signal terminals.

Selection boundary: This part is a passive analog signal switch with digital control. It is not a voltage regulator, gain stage, isolation barrier, high-current load switch or guaranteed over-voltage-tolerant signal path.

SPDT Routing, Control Logic and Pin Assignment

IN LOW selects the normally closed path from COM to NC. IN HIGH selects the normally open path from COM to NO. The signal terminals are bidirectional.

SN74LVC1G3157 internal SPDT block diagram
PDF block diagram showing COM switched between NC and NO.
SN74LVC1G3157 top-view pin configuration and function table
Common SOT23-6 / SC70-6 pin assignment and control truth table.
PinNameTypeFunctionEngineering note
1NOAnalog I/ONormally open signal terminalConnected to COM when IN is HIGH.
2GNDPowerGroundUse a short local return path.
3NCAnalog I/ONormally closed signal terminalConnected to COM when IN is LOW.
4COMAnalog I/OCommon signal terminalBidirectional; selected to NC or NO.
5V+PowerPositive supplyPlace local bypass capacitance close to pins 5 and 2.
6INDigital inputChannel-select controlLOW selects NC; HIGH selects NO.

Ordering Codes and Package Selection

Ordering numberTemperature rangePackage listed in PDFTop markingMSLPacking
SN74LVC1G3157DBVR-40 °C to +125 °CSC70-6 / SOT363 equivalentCC5FMSL 3Tape and reel, 3,000 units
SN74LVC1G3157DCKR-40 °C to +125 °CSOT23-63157MSL 3Tape and reel, 3,000 units

The package mapping above follows the supplied PDF. Confirm the complete orderable code, package and top marking against controlled purchasing documentation before release.

Operating Conditions, Signal Range and Absolute Limits

ParameterConditionMinimumMaximumUnit
Supply voltage, V+Operating1.85.5V
Analog signal voltageNO, NC or COM0V+V
Digital input HIGH, VINHV+ = 5 V / 3.3 V1.5 / 1.3-V
Digital input LOW, VINLV+ = 5 V / 3.3 V-0.6 / 0.5V
Ambient temperature, TAOperating-40125°C

Absolute maximum and handling limits

ParameterMinimumMaximumUnit
Supply voltage, V+-0.36.0V
Digital input voltage-0.36.0V
Analog / digital terminal voltage-0.3V+ + 0.3V
Continuous current at NO, NC or COM-300+300mA
Peak current at NO, NC or COM-500+500mA
Junction temperature-150°C
Storage temperature-65150°C
Thermal impedanceθJA = 235 °C/W for SOT23-6 and 270 °C/W for SC70-6.
ESD ratingsHBM ±1000 V, CDM ±1000 V and MM ±100 V.
Clamp boundaryLimit current to 10 mA or less if a terminal swings more than 0.3 V beyond a supply rail.

On-Resistance, Leakage and Control Thresholds

ParameterConditionV+TypicalFull-range maximum
On-resistance, RONSignal = V+/2, ICOM = -10 mA5 V4.5 Ω8.5 Ω
On-resistance, RONSignal = V+/2, ICOM = -10 mA3.3 V7 Ω10.5 Ω
Channel RON match, ΔRONSignal = V+/2, ICOM = -10 mA5 V / 3.3 V0.15 Ω0.4 Ω
RON flatness0 V to V+/2, ICOM = -10 mA5 V2 Ω3.3 Ω
RON flatness0 V to V+/2, ICOM = -10 mA3.3 V3 Ω4.3 Ω
OFF leakageNO or NC off1.8 V to 5.5 V-1 µA
ON leakageSelected channel on1.8 V to 5.5 V-1 µA
Control input leakageIN at supply or ground1.8 V to 5.5 V-1 µA
Supply currentIN at ground or V+5.5 V-1 µA
Signal boundary: Keep NO, NC and COM between 0 V and V+ during normal operation. RON depends on supply, signal voltage, temperature and current; use the full-range limits for worst-case loss calculations.

Switching Time, Break-Before-Make and Bandwidth

Parameter5 V typical3.3 V typicalCondition / unit
Turn-on time, tON3040ns at +25 °C, RL = 300 Ω, CL = 35 pF
Turn-off time, tOFF2530ns at +25 °C, RL = 300 Ω, CL = 35 pF
Break-before-make delay, tBBM58ns at +25 °C, RL = 300 Ω, CL = 35 pF
Off isolation-52 dB at 10 MHz; -71 dB at 1 MHzTypical, RL = 50 Ω
-3 dB bandwidth300 MHzTypical, switch ON, RL = 50 Ω
OFF capacitance5 pFTypical at +25 °C
ON capacitance15 pFTypical at +25 °C
Simplified SN74LVC1G3157 SPDT switching behavior
Essential routing only: IN = 0 selects COM-to-NC; IN = 1 selects COM-to-NO.

Signal Integrity, Control and PCB Guidance

  • Stay within the rails: keep the analog signal from 0 V to V+ in normal operation.
  • Use break-before-make wisely: the device reduces momentary channel overlap, but system timing and charge injection still require validation.
  • Control IN firmly: tie unused digital inputs to V+ or GND and verify the listed thresholds at the actual supply.
  • Minimize parasitics: use short routes and a continuous return reference for wide-band signals.
  • Budget insertion loss: include worst-case RON, receiver impedance, source impedance and connector resistance.
  • Bypass locally: place a 0.1 µF capacitor close to V+ and GND.

System check: Validate bandwidth, distortion, off isolation, crosstalk, charge injection, switching transients, signal amplitude, source impedance and PCB parasitics in the finished design.

SC70-6 and SOT23-6 Packages, Land Patterns and Packing

The packages share the same logical pin assignment but have different body dimensions, lead pitch, marking and thermal impedance. Do not share one PCB footprint between them.

SN74LVC1G3157 SC70-6 package outline and land pattern
SC70-6 outline, dimensional table and recommended land pattern.
SN74LVC1G3157 SOT23-6 package outline and land pattern
SOT23-6 outline, dimensional table and recommended land pattern.
DimensionSC70-6SOT23-6Unit
Overall height A0.900 to 1.1001.050 to 1.250mm
Body length D2.000 to 2.2002.820 to 3.020mm
Body width E1.150 to 1.3501.500 to 1.700mm
Overall lead span E12.150 to 2.4502.650 to 2.950mm
Lead pitch e0.650 BSC0.950 BSCmm
Outer lead pitch e11.300 BSC1.800 to 2.000mm
Lead width b0.150 to 0.3500.300 to 0.500mm
Lead length L0.260 to 0.4600.300 to 0.600mm
SN74LVC1G3157 SC70-6 and SOT23-6 tape-and-reel dimensions
Both packages use a 7-inch reel, 9.5 mm reel width, 8.0 mm carrier tape, 4.0 mm pitch and Q3 pin-1 quadrant.

Application Guidance and Design Limitations

The supplied specification lists the following application areas. These are use contexts, not end-product approvals or safety certifications.

Wearable device applicationWearable DevicesRoute compact sensor or user-interface signals after full system validation.
Battery-operated equipment applicationBattery-Operated EquipmentSelect analog or digital paths with low static supply current.
Signal gating and modem applicationSignal Gating and ModemsSupport chopping, modulation, demodulation and conversion-path multiplexing.
Portable computing applicationPortable ComputingSwitch board-level signal paths in space-constrained computing hardware.
Cell phone applicationCell PhonesRoute low-voltage signals after bandwidth and distortion checks.
Qualification boundary: Validate EMC, ESD protection, audio or RF performance, thermal limits, power sequencing, assembly and environmental performance in the finished product.

SN74LVC1G3157 Engineering FAQs

What function does SN74LVC1G3157 implement?

It is an SPDT analog switch. IN LOW connects COM to NC, and IN HIGH connects COM to NO.

Can NO, NC and COM be used in either signal direction?

Yes. The PDF states that NO, NC and COM may be inputs or outputs.

What signal range is recommended?

Analog signals should remain between 0 V and V+ during normal operation.

What is the typical on-resistance?

RON is typically 4.5 Ω at V+ = 5 V and 7 Ω at V+ = 3.3 V under the specified midpoint and -10 mA test condition.

What does break-before-make mean?

The currently selected channel opens before the alternate channel closes, reducing momentary conduction between NO and NC during switching.

What supply range is recommended?

V+ is specified from 1.8 V to 5.5 V.

Which packages are listed?

The supplied PDF lists SN74LVC1G3157DBVR as SC70-6 with CC5F marking and SN74LVC1G3157DCKR as SOT23-6 with 3157 marking. Both are MSL 3 and tape-and-reel packed in quantities of 3,000.

Can the digital control input be left open?

No. Every unused digital input must be held at V+ or GND.

Technical source and design authority

This page summarizes the supplied SN74LVC1G3157 Rev A.1 product specification for component evaluation. Confirm the current controlled specification, ordering code, marking, pin assignment, electrical limits, package tolerances and qualification requirements before production release.

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