FRTC1337S Low-Power I²C Real-Time Clock with Dual Time-of-Day Alarms

NYFEA FRTC1337S is a 1.8 V to 5.5 V I²C real-time clock with an external 32.768 kHz crystal, two programmable time-of-day alarms, oscillator-stop detection and a programmable square-wave output.

Product scope: FRTC1337S is a calendar RTC IC. It requires an external 32.768 kHz crystal, I²C pull-up resistors and system firmware for initialization, coherent time reads, alarm servicing and oscillator-stop validation. It does not include a backup-supply pin.

Use the current controlled PDF for register definitions, timing, test conditions, package dimensions and production release decisions.

NYFEA FRTC1337S real-time clock product appearance illustration
FRTC1337S product appearance illustration. Use the controlled PDF for package dimensions, terminal numbering and land-pattern decisions.
CLOCK SOURCEExternal 32.768 kHz crystal; specified ESR up to 70 kΩ; internal capacitance listed as 12 pF
HOST INTERFACEI²C, up to 400 kHz
POWER1.8 V to 5.5 V
TEMPERATURE-40 °C to +85 °C

Product Overview and Scope

NYFEA FRTC1337S is a 1.8 V to 5.5 V I²C real-time clock with an external 32.768 kHz crystal, two programmable time-of-day alarms, oscillator-stop detection and a programmable square-wave output.

Selection boundary: Similar I²C functionality or pin count does not establish drop-in compatibility with another RTC. Compare address, registers, oscillator and power architecture before committing a PCB or firmware migration.

Key Features

Calendar

Seconds, minutes, hours, day, date, month and year in BCD; 12/24-hour operation and leap-year correction.

Alarms

Two time-of-day alarms with maskable repeat rates and open-drain interrupt routing.

Square wave

Selectable 1 Hz, 4.096 kHz, 8.192 kHz or 32.768 kHz output.

Clock supervision

Oscillator-stop flag supports startup and time-validity checks.

Function Block

The functional block diagram shows how the oscillator, divider and calendar logic, control/status registers, host interface and output or interrupt functions are connected inside FRTC1337S.

FRTC1337S real-time clock function block diagram
FRTC1337S functional architecture, reproduced at high resolution from the controlled product specification. Signal names and functional relationships must be read together with the register descriptions in the PDF.

Timekeeping and Calendar Operation

The calendar is encoded in BCD unless the controlled PDF states otherwise. Firmware should use a coherent multi-byte read, validate field ranges and apply the device-specific century and leap-year rules.

CalendarSeconds, minutes, hours, day, date, month and year in BCD; 12/24-hour operation and leap-year correction.
AlarmsTwo time-of-day alarms with maskable repeat rates and open-drain interrupt routing.
Square waveSelectable 1 Hz, 4.096 kHz, 8.192 kHz or 32.768 kHz output.
Clock supervisionOscillator-stop flag supports startup and time-validity checks.

I²C Interface, Outputs and Interrupts

Host interfaceI²C, up to 400 kHz
7-bit slave address1101000b (0x68)
Output and interrupt scopeAlarms, square-wave output and clock supervision
Pull-up requirementSDA and the open-drain interrupt/output pins require external pull-up resistors selected for the logic rail, bus capacitance and required rise time.
Firmware responsibilityInitialize the control registers, read and clear status flags, and use a coherent multi-byte access procedure around calendar rollovers.

Read Mode

To read from a selected register, the controller first writes the register address, issues a repeated START, and then addresses FRTC1337S for reading. The device returns data beginning at the selected register. For a multi-byte read, the controller acknowledges each byte that is followed by another byte; it terminates the final byte with NACK and then issues STOP.

FRTC1337S I2C read-mode bus sequence showing register-address selection, repeated START and sequential data read
FRTC1337S read-mode sequence reproduced from the product specification. S is START, Sr is repeated START, P is STOP, and the final controller response is NACK.
  • Use the write phase only to select the starting register; no register data is written during this phase.
  • Use a repeated START before the read address phase.
  • End the last received byte with NACK before STOP; otherwise the device interprets an ACK as a request for another byte.

Write Mode

For a write transfer, the controller sends START, the 7-bit slave address with the write bit, and the target register address. One or more data bytes then follow. FRTC1337S acknowledges the accepted address and each accepted data byte; STOP completes the transaction.

FRTC1337S I2C write-mode bus sequence showing slave address, register address and sequential data bytes
FRTC1337S write-mode sequence reproduced from the product specification. Verify register access rules, reserved bits and status-flag behavior before writing production firmware.
  • Write only defined register values and preserve reserved bits as required by the register description.
  • After writing time or control registers, read back the programmed values and confirm the relevant status flags.

Power, Backup and Time-Validity Strategy

Primary supply1.8 V to 5.5 V
Timekeeping / backup1.7 V to 5.5 V oscillator range
Backup architectureNo dedicated backup-supply pin
Retained user memoryNo general-purpose NVRAM stated
Current conditionActive supply current: 150 µA max under the stated 400 kHz test condition; standby: 0.5 µA typ., 0.8 µA max under the specified condition

Current values are meaningful only with the adjacent voltage, interface, output and temperature conditions. Estimate system backup life from the worst-case current, source capacity after derating, leakage paths, pull-ups and switchover behavior.

Electrical Conditions and Accuracy

Operating supply1.8 V to 5.5 V
Timekeeping / backup condition1.7 V to 5.5 V oscillator range
I²C interfaceI²C, up to 400 kHz
Operating temperature-40 °C to +85 °C
Current conditionActive supply current: 150 µA max under the stated 400 kHz test condition; standby: 0.5 µA typ., 0.8 µA max under the specified condition
Accuracy / stabilitySet by the selected crystal, loading, PCB parasitics, temperature and calibration of the finished assembly
PackageSOP-8, 1.27 mm pitch

PDF audit note: The operating and electrical tables consistently support -40 °C to +85 °C and 1.8 V to 5.5 V operation.

Typical Application Circuit

This product-level circuit shows the complete FRTC1337S connection concept from the controlled PDF: host I²C lines, external pull-ups, crystal network, supply decoupling, interrupt/output pull-ups and ground connection. It is not a complete end-product schematic; power sequencing, energy-source selection, EMC protection and production test remain system responsibilities.

Complete FRTC1337S typical application circuit with CPU, I2C pull-ups, 32.768 kHz crystal, decoupling and interrupt outputs
Complete FRTC1337S typical application circuit reproduced from the product specification. Confirm pin numbering, pull-up values, decoupling, crystal requirements and supply conditions before PCB release.
  • Provide pull-up resistors for SDA, SCL, INTA and SQW/INTB according to the selected logic rail and bus loading.
  • Place the supply bypass capacitor close to the VCC and GND pins and keep the high-current return paths away from the oscillator area.
  • Use the oscillator-stop status as a time-validity indicator and initialize the calendar and control registers before accepting timestamps.

Recommended Layout for Crystal

Place the 32.768 kHz crystal immediately beside X1 and X2. Keep the oscillator loop short, surround it with a grounded guard ring, and provide the local ground plane arrangement shown in the specification. The crystal, oscillator traces and X1/X2 pins should be isolated from RF-generating signals and fast switching nodes.

FRTC1337S recommended 32.768 kHz crystal PCB layout with grounded guard ring and local ground plane
Recommended crystal layout reproduced from the controlled PDF. C1 and C2 are optional 0 to 15 pF trimming capacitors; the listed internal X1/X2 capacitance is 12 pF typical. Select and validate the crystal using the specified 32.768 kHz frequency and 70 kΩ maximum ESR limits.

Package Information

Available package: SOP-8 with 1.27 mm lead pitch. The drawing below includes the package outline, terminal identification, dimension table and recommended land pattern. All dimensions are in millimetres unless otherwise stated.

Clear FRTC1337S SOP-8 package drawing, dimensions and recommended PCB land pattern
FRTC1337S SOP-8 package information reproduced at high resolution from the controlled product specification. The land pattern is a reference recommendation; confirm the footprint against the current package drawing, assembly process and manufacturing rules.

Package dimensions exclude burrs, mould flash and protrusions as stated in the PDF. Do not use the rendered product appearance image for pin numbering or dimensional inspection.

Application Guidance and Design Limitations

The controlled product specification explicitly lists portable instruments, electronic metering and telecom equipment. The notes below explain how the RTC functions relate to those listed applications without extending the product claim to unlisted markets.

Portable instrument application for the FRTC1337S real-time clock Portable Instruments Use the calendar, dual alarms and square-wave output for local timekeeping and scheduled host events. The final instrument must provide the external 32.768 kHz crystal, pull-up resistors, initialization and oscillator-stop validation.
Electronic metering application for the FRTC1337S real-time clock Electronic Metering Use RTC time for interval records, service events or display functions. Measurement data storage, billing integrity, legal-time requirements and recovery from invalid time remain responsibilities of the completed meter.
Telecom equipment application for the FRTC1337S real-time clock Telecom Equipment Use retained calendar time for local event logs and maintenance schedules. FRTC1337S has no dedicated backup-supply pin, so any hold-up or source-selection function must be implemented and validated externally.
Application boundary: Use the controlled PDF for electrical limits and validate clock accuracy, initialization, time validity, backup life, I²C operation, interrupts, EMC, safety, assembly and environmental behavior in the complete product. An application example is not product certification or a guarantee of finished-system performance.

FRTC1337S Engineering FAQs

What is the FRTC1337S?

FRTC1337S is a NYFEA I²C real-time clock device. FRTC1337S is a calendar RTC IC. It requires an external 32.768 kHz crystal, I²C pull-up resistors and system firmware for initialization, coherent time reads, alarm servicing and oscillator-stop validation. It does not include a backup-supply pin.

What supply range does FRTC1337S use?

The controlled PDF specifies 1.8 V to 5.5 V. The timekeeping or backup condition is listed separately as 1.7 V to 5.5 V oscillator range.

Does FRTC1337S include a crystal?

External 32.768 kHz crystal; specified ESR up to 70 kΩ; internal capacitance listed as 12 pF.

What is the FRTC1337S operating temperature range?

The supported operating range used on this page is -40 °C to +85 °C.

Can FRTC1337S replace another RTC without redesign?

Do not infer a drop-in replacement from a similar function, interface or package. Verify pinout, I²C address, register map, power-fail behavior, oscillator network, interrupt handling, package dimensions and firmware in the final system.

How should time validity be checked after power-up?

Initialize the device as required, inspect the available oscillator-stop or voltage-status flags, perform a coherent calendar read and reject timestamps until the system has established a valid time source.

Technical source and design authority

This page summarizes the FRTC1337S product specification for product evaluation and engineering reference. It does not replace the complete controlled specification. Confirm the current revision, register definitions, pin configuration, interface timing, absolute maximum ratings, oscillator and backup requirements, package dimensions, PCB layout, assembly process and qualification requirements before production release.

Download FRTC1337S Product SpecificationContact NYFEA for Product Support
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